Liquid crystal display devices are planar display devices having excellent features such as high definition, thin shape, lightweight, and low power consumption. In recent years, the market scale of liquid crystal display devices has been expanded along with improvements in display performance, improvements in production capacity, and improvements in price competitiveness with respect to other display devices.
In a liquid crystal display device, a long period of continuous application of a DC voltage to the liquid crystal layer causes deterioration in the element; therefore, for longer operating life, it is necessary to carry out AC driving (inversion driving) by which the polarity of an applied voltage is periodically reversed.
However, in the case of an active matrix type liquid crystal display device of a frame inversion driving scheme where inversion driving is carried out every frame, some unbalance between positive and negative voltages that are applied to the liquid crystals is inevitable due to various factors such as the dielectric anisotropy of the liquid crystals, fluctuation in pixel potential due to a parasitic capacitance between the gate and source of a pixel TFT (thin-film transistor), and deviation from the center value of a counter electrode signal. As a result, there occurs a minute fluctuation in luminance at half a frequency as high as the frame frequency, and a flicker, i.e., an unsteady light that goes on and off quickly, is perceived. In order to prevent this, an inversion driving scheme is generally employed which, in addition to carrying out inversion every frame, puts a pixel signal in each line or pixel in the opposite polarity to a pixel signal in an adjacent line or pixel.
It should be noted here that in the case of dot inversion where polarity reversal is carried out in units of pixels, there is a problem of decrease in charging rate of each pixel due to a signal delay in a data signal line. In order to suppress this problem, a drive scheme has been proposed which reverses the polarity of a data signal voltage every multiple horizontal periods (every multiple rows). Such drive schemes, each of which carries out polarity reversal every multiple horizontal periods, are classified broadly into a block inversion driving scheme and a multiple-line inversion driving scheme. The block inversion driving scheme is a scheme which, with each gate line divided into a plurality of blocks, carries out interlaced scanning for each of the blocks. The multiple-line inversion driving scheme is a scheme which, with its scanning scheme being a sequential scanning scheme, carries out polarity reversal every time a plurality of lines are scanned.